Quatech 802.11B/G Instrukcja Użytkownika Pobierz pdf (Strona 32)

Quatech, Inc. Airborne Enterprise Module Databook

32 7/15/2010 100-8080-120

9.0 RESET Function

For correct operation of the on-board Power-on RESET (POR) and internal RESET

controllers, the RESET pin on the WLNG-XX-DP500 family must obey the following

timing and signal conditions.

Figure 5 - Power on RESET Timing

Figure 6 - RESET Timing

Table 17 - RESET Timing

Symbol

Parameter

Min

Typ

Max

Units

PURST

Valid V

to RESET valid

200

RLRV

RESET Valid to RESET Low

RPWI

Valid V

to Internal RESET completed

200

RPW

RESET Pulse Width

100

µs



For Hardware revisions Rev C2 and earlier additional timing constraints apply. Please contact

Quatech Technical Support for details.

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Quatech 802.11B/G Instrukcja Użytkownika Strona 32