Quatech DSP-100 Instrukcja Użytkownika Pobierz pdf (Strona 19)

2.2.1.4 Example 4

DSP100EN.EXE (s0,b300,i3,wd8)

In example 4, the Enabler will configure the DSP-100 in socket 0 with a base address of

300H and IRQ 3 using a configuration memory window at segment D800. The

DSP-100's interrupt status register will be enabled.

2.2.1.5 Example 5

DSP100EN.EXE (s0,b300,i5,r)

In example 5, the Enabler will release the configuration used by the DSP-100 in socket 0

using a configuration memory window at segment D000. The base address and IRQ

parameters are ignored and may be omitted.

2.2.1.6 Example 6

DSP100EN.EXE (s1,r,wcc)

In example 5, the Enabler will release the configuration used by the DSP-100 in socket 1

using a configuration memory window at segment CC00.

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